Chuck Moore: Part 2: From Space to GreenArrays
Part 2 of my abbreviated biography of Chuck H. Moore’s processor designs. Part 1 covered the early days of Novix, and the RTX2000.
Moore was not content to just create one processor design, or one company. In the 1980’s he also ran Computer Cowboys, a consulting/design company. In 1985 he designed the Sh-boom processor with Russell H. Fish III. This was a 32-bit stack processor, though with 16 general purpose registers, that was again designed with Forth in mind. It was capable of running much faster then the rest of the system so Moore designed a way to run the processor faster then the rest of the board, and still keep things in sync, innovative at them time, and now standard practice. The Sh-Boom was not a particularly wide success and was later licensed by Patriot Scientific through a company called Nanotronics, which Fish had transferred his rights to the Sh-Boom to in 1991. Patriot rebranded and reworked the Sh-Boom as the PSC1000 and targeted it to the Java market. Java byte code could be translated to run in similar fashion as Forth on the PSC1000 and at 100MHz, it was quick. In the early 2000’s Patriot again rebranded the ShBoom and called the design IGNITE. Patriot no longer makes or sells processors, concentrating only on Intellectual Property (Patent licensing).
After designing the Sh-Boom, and the Novix series, Moore developed yet another processor in 1990 called the MuP21. This was the beginning of a what would be a common thread in Moore’s designs. MISC (Minimal Instruction Set Computer), which is essentially an even simpler RISC design, multiprocessor/multicore, and efficiency have become the hallmarks of his designs. The MuP21 was a 21 bit processor with only 24 instructions. At 20MHz performance was 80 MIPS as it could fetch four 5-bit instructions in a 20 bit word. It was manufactured in a 40 pin DIP on a 1.2 micron process with 7000 transistors.
In 1993 Moore designed the F21, again a 21 bit CPU based on the MuP21, designed to run Forth, and including 27 instructions. It was fab’d by Mosis on a 0.8u process. The F21 microprocessor contains a Stack Machine CPU (with a pair of stacks like the NC4000), a video i/o coprocessor, an analog i/o coprocessor, a serial network i/o coprocessor, an parallel port, a real time clock, some on chip ROM and an external memory interface. Performance was 500 MIPS (this was an asynchronous design, so ‘clock speed’ is a bit of a misnomer) and transistor count had risen to about 15,000. The F21 was made up through 1998, however the design continued to evolve. A version of the F21 was developed called the i21, originally for Chuck Moore’s iTV Corporation, which was one of the very first set top Internet appliance companies. It integrated additional featured such as infrared remote interface, modem DMA interface and a keyboard DMA interface. The F21 scaled well, and was tiny, remember, only 15,000 transistors, which at 0.18u takes up a VERY small die, and allowed performance to hit 2400MIPS @ 1.8V. One could put a very large amount of these on a single die…..