AMD AM29116DC – 1987 10MHz

In 1980 there was not yet a clear winning architecture for microprocessors.  Many of the companies of the 1970’s were still churning out designs, hoping for design wins.  Intel had yet to become a dominating force, though their 8086 line was becoming popular.  AMD was one of the innovators of the time. Now known for their x86 processor, AMD made many other designs that were very successful.

In 1980 AMD was already making 2 16-bit class processors.  They were a second source for the Intel 8086 (8/16 bit) as well as the primary second source for the Zilog Z8000 processor.  They soon would pick up manufacturing demand for the Intel MCS-51 line as well.  This was not enough for AMD, they sought to design a 16-bit microprocessor that would excel at high speed control applications (such as telecom and disk controllers).  Thus began one of the most ambitious and complex designs of the time.  In order to meet their performance goals the design had to be done in ECL, on a bipolar process, this is a bit more complicated for a large device then a NMOS part, mainly due to its power requirements and heat.

AMD AM29117GC – 1985 – Dual port version

In 1981 AMD announced the Am29116 microprogrammed 16-bit processor.  It was made on a 2 micron process and contained 2500 effective gates (~14,000 transistors, 50mm² die area).  Max speed was 10 MHz. Samples were available starting in early 1982.  The target competition was not the 8086 or Z8000 but The DEC T-11 ‘Tiny’ processor, which was made in NMOS and ran at 2.5MHz.  The Am29116 is technically a bit-slice processor, like AMD’s wildly successful 2901 processor but adds a bit more functionality including instruction for bit manipulation, CRC generation, as well as a barrel shifter and an on chip scratch pad RAM (32x16bit).  It has an accumulator, ALU, status register, and instruction latching/decoding for the 167 instructions.  What the 29116 lacks is a PC (Program Counter).  Program sequencing is handed by external logic, either custom, or using AMD 29112 microprogram sequencers.  It is the job of the sequencer to feed instructions to the 291116, handled jumps, calls, returns, and memory accesses.  This puts the 29116 somewhere between the basic 2901 and a full featured processor like the Z8000.  AMD also produced the 29117 which added a second 16-bit port, resulting in a dedicated input port (D) and a dedicated output port (Y), whereas the 29116 had a single I/O port.  This allowed for faster processing where data could be read and written simultaneously.  The 29117 was available in a PGA68 package (16 more pins then the DIP52 of the 29116)

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The  IBM POWER4 was released in 2001.  It was a 1.1-1.9GHz dual core processor widely used in IBM’s server line including the RS/6000 and AS/400.  It can be commonly found as a single chip dual core, but also as a large MCM containing 4 POWER4 dies. These MCMs include a very large and heavy aluminium heatsink attached to a solid copper housing.  The complete unit weighs in at a hefty 3kg.  The heatsink and housing can be removed revealing a 230 gram MCM (with its small heat spreaders).

To disassemble one of these you will need a variety of tools.  A 4 mm socket, hex bits (2.5, 3 and 4mm), T8 torx bit , a medium flat tip screw driver, gloves and a good heat source (I use a propane torch)

First remove the 4 T8 torx screws that hold the interposer to the module.  It gets in the way and can melt easily.  Also remove the 8 3mm screws around the perimeter.  These hold the aluminium heatsink to the copper housing.

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MOS MCS6501 – November 1975

One of the classic stories of the 1970’s microprocessor boom times was that of MOS Technologies at WESCON (Western Electronics Show and Convention) on September 16th 1975 in San Francisco.  MOS Technology was a newcomer to microprocessors.  They had with them two brand new processor design, the MCS6501 and the MCS6502 which they hoped to sell on the floor at Wescon, for $20 and $25 each.  However Wescon forbid sales on the convention floor, so quick thinking by MOS Technologies Chuck Peddle directed people to a hotel room, where “the beer was free and chips were $25.”  In the room were jars of 6501 and 6502 processors, to give them impression that these were in full production.  In reality the bottoms of the jars were filled with defective parts.  It was no matter, the 6500 series was a huge hit, led largely by its availability, low price and marketing to everyone (not just ‘big corporate users’).  The 6500, and specifically the 6501 have an interesting story leading up to that fateful day at WESCON.

Motorola XC6800B – July 1975 – Pre-production part, not something MOS bothered with.

It begins at Motorola, where Chuck Peddle, Bill Mensch and several others were employed in the early 1970’s design the MC6800 processor and its peripherals.  The 6800 was not a bad design, it was however, very expensive, a development board for it costing over $300.  Chuck worked largely as the 6800 system architect, ensuring all the ICs worked well together and were what was needed to meet customers needs.  He attended many calls to potential clients and noted that many were turned off by one thing, price.  With that in mind he sought out to build a lower cost version of the 6800 using some of the newer processes available (specifically depletion mode NMOS vs the enhancement mode of the 6800).  Motorola management wouldn’t hear it, they wanted nothing to do with a lower cost processor available to the masses.  And with that, Chuck, Bill and over half the 6800 team left.

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