May 20th, 2015 ~ by admin
TI TMX70P81 – Early 8K Piggyback Prototype. Never released
The 1980’s brought many 8-bit microcontrollers to the market, such famous designs as the Intel MCS-51, the Zilog Z8, and the Motorola MC680x. There were many others as well, including TI’s entry into the market. After the race into the market with one of the first microcomputers, the 4-bit TMS1000, and the top of the line TMS9900 16-bit processor, TI saw the need to fill in the middle, the 8-bit market. TI didn’t want to make the 7000 series just another 8-bit MCU either, they wanted something different, not so different as to be eccentric, but something to set them apart. They did so with an innovation they called SCAT.
TMS7020 (2K EPROM + 128 bytes RAM) SCAT Layout. Notice the ‘strips’ that form the different sections of the MCU (click to enlarge)
SCAT, Strip Chip Architecture Topology, was TI’s die layout design for the TMS7000. Instead of generating each of the blocks for the chip (SLU, ROM, RAM, etc) making them as small as possible, and then using random logic to tie them all together, they laid them out in strips on the die. The ROM in a strip, the RAM in a strip, and the ALU etc in another. This allowed the sections to be wired up with a minimum of random logic, resulting in a smaller die, that was also easier to test. More importantly it allowed the TMS7000 to be easily expanded. Adding more ROM, or RAM didn’t require redoing the entire layout, it was just added to its respective ‘strip’.
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May 3rd, 2015 ~ by admin
AMD AM29501DC – 10MHz Byte Slice
AMD is well known for its 2901 bit-slice processor of the 1970’s (being made well into the 1990’s), as well as the previously detailed AM29116 16-bit processor released in 1981. However, the 1980’s brought another AMD design as well, though not as complicated, it is no less interesting. In 1981, there was not a clear DSP (Digital Signal Processor) architecture, or really purpose built design. The Signetics 8X300 was well suited for such work, but was not inherently designed for it. DSP tasks were handled by other processors, or by completely custom designs. The AM29501 was not designed as a DSP, but it was marketed as a signal processor, at least for the first 5 years of manufacture. What the 29501 was, was a relatively fast, and pipelined, byte slice processor, basically a highly upgraded AM2901.
As the name suggests, the 29501 processes data 8-bits at a time, and as a slicer, it requires external program control (it lacks a PC (Program Counter) or sequencer). It has an 8-function ALU, and 6 sets of registers, which can be accessed independently, allowing for a pipelined architecture, multiple instructions may be issued before the first one is completed (as long as they don’t need the same resources). While the ALU is doing some addition, more data may be fetched, or output to one of the 3 8-bit buses. AMD designed the 29501 to be able to do advanced DSP work, and such work requires multiplication, which is something the ‘501 cannot do itself. The 29501, however, was explicitly designed to interface to the AM29516/7 16-bit multipliers. If a multiplication is needed the microprogram controller simply puts it on the multiplier bus and tells the 2951x to handle it. A fairly advanced system could be built by using a 29116 a 29516 as well as a 29501, building a complete pipelined DSP system. One of the first designs using the 29501 in such a way was a finger print recognition system, for matching images of fingerprints, a particularly intense DSP task for the 1980’s.
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