Original Document

Next Generation IntelŪ StrongARMŪ Technology to Deliver 600 MHz at Less than Half a Watt

Groundbreaking Design Enables Development of Advanced Handheld, Internet Access and Internet Backbone Devices

SANTA CLARA, Calif., May 3, 1999 -- Intel Corporation today disclosed details of its next generation StrongARMŪ technology, designed to accelerate the development of advanced handheld computing products, enable new classes of low power, high performance Internet access devices, and enhance Internet backbone products.

"The combination of Intel's advanced manufacturing process technology and innovative design techniques continues the high performance and low power leadership of Intel's StrongARM technology," said Bill Johnson, vice president of Intel's Computing Enhancement Group and general manager of the StrongARM and Bridges Division. "With the next-generation StrongARM technology, Intel processor roadmaps now span market segments from power-sensitive handheld products through performance-hungry Internet access devices."

According to International Data Corp.** the worldwide market for smart handheld devices, including smart phones, handheld companions and other vertical application devices, is growing worldwide at a compound annual growth rate of 43% between 1998 and 2002. By 2002, IDC estimates worldwide volume shipments of these devices to surpass 25 million units in a market worth more than $13 billion.

Performance Up, Power Down

"Based on our current estimates, the next generation StrongARM technology is expected to deliver two to three times the performance of the current StrongARM generation while keeping power consumption below one-half watt," said Mark Casey, StrongARM marketing director. "At speeds of 150 MHz to 600 MHz, next-generation StrongARM processors should deliver performance that scales from 185 to 750 MIPS*** while consuming only 40 to 450 milliwatts."

High-Performance, Low-Power Design Breakthroughs

The next generation StrongARM technology employs state-of-the-art micro-architecture and circuit design techniques to maximize the MIPS-per-milliwatt ratio. The Intel Super-pipelined RISC Architecture implementation uses seven-stage integer and eight-stage memory pipelines to achieve high execution rates at fast clock speeds. Dynamic branch prediction and extensive data bypassing drastically increase data throughput.

Intel Dynamic Voltage Management techniques that achieve high performance and extend battery life include aggressive voltage scaling, low power modes that "turn off" portions of circuitry when idle and "wake up" quickly to resume full functions, and low voltage operation.

The next generation StrongARM technology continues to implement, and is fully compatible with, the ARMŪ architecture and supports a range of operating systems including Windows* CE*, OS-9*, JavaOS*, pSOS*, EPOC32*, Nucleus*, and VxWorks*. Intel processors based on the next generation StrongARM technology will be sampling during the first half of 2000.

Intel, the world's largest chip maker, is also a leading manufacturer of computer, networking and communications products. Additional information about Intel is available at www.intel.com/pressroom.

StrongARM and ARM are registered trademarks of ARM Limited.
*Third-party marks and brands are the property of their respective owners.
**"Smart Handheld Devices - It's a Small, Small World: Worldwide Smart Handheld Devices market Review and Forecast, 1998-2002" by Diana Hwang, Jill House and Randy Giusto. ã International Data Corporation - November 1998.
***Dhrystones 2.1 - Source: IntelŪ; based on preliminary calculations.
*© 1999 Intel Corporation