Original Document
Intel® Next-Generation StrongARM® Processors
To help the industry meet these demanding requirements, Intel is introducing next-generation StrongARM® technology, representing a quantum leap in performance without trade-offs in low-power capability. For comparison purposes, today's StrongARM processors deliver 200 MHz and draw 650 mW at 1.65 Vdd. The mid-range chip in Intel's next-generation StrongARM processor lineup will deliver twice the performance with one-third the power consumption, at 45 percent less voltage.
Next-generation StrongARM processors are based on a high-performance, ultra-low power 32-bit RISC architecture implementation and Intel's new 0.18 µ process. These chips will provide a number of significant advantages for developers:
- High processing power—up to 750 MIPS at less than 500 mW.
- Scalable combinations of performance and power consumption—from 150 MHz to 600 MHz at 40 mW to 450 mW.
- Scalable voltage— from 0.75 Vdd to 1.3 Vdd.
- Compatibility—with current ARM™ architecture.
In addition, support by a network of third-party vendors providing operating system ports and development tool stacks will enable quicker time-to-market for your products.
Intel's next-generation StrongARM architecture implementation will enable designers to develop a new class of low-power Internet access products that provide greater functionality and richer features while maintaining long battery life. Internet access devices represent just half of the new product story. The high performance and bandwidth of future StrongARM technology will also enable the industry to develop a new generation of cost-effective, high-performance Internet backbone devices, including networking, modem banks, and remote-access servers.
Delivering More MIPS…
Faster Internet connections, voice recognition, real-time video, and larger video displays all demand more processing power than is available from the current generation of 32-bit RISC processors.
Here's just one example. A palm-size device capable of taking dictation requires about 250 MIPS for voice recognition, enough all by itself to push the performance envelope of today's processors. Since it would be impractical for a single function like voice recognition to consume all of a device's available processing capacity, it's clear that more headroom is vital. Next-generation StrongARM processors will deliver up to 750 MIPS, leaving 500 MIPS of processor headroom available for the support of display functions and other value-added features.
Here are some of the ways Intel is building more performance into the next generation of StrongARM processors:
- Next-generation StrongARM technology features the Intel® Super Pipelined RISC Architecture implementation, including a seven-stage integer and eight-stage memory pipeline for dramatically faster processor clock rates.
- Integrated caches have been expanded to further enhance performance. Next-generation processors will include 32 Kbyte 32-way associative instruction and data caches and a 2 K-byte 2-way associative mini-cache. These caches represent significant increases over the current-generation StrongARM architecture implementation.
Among other applications, these performance advances will enable developers to build a whole new class of faster programmable, intelligent Internet access devices capable of simultaneously supporting multiple windows for TV and digital video content.
…With Extremely Low Power
The remarkable thing about next-generation StrongARM processors is that they achieve solid performance gains without tradeoffs in the extremely low-power characteristics for which the StrongARM architecture is noted. Next-generation StrongARM chips feature innovative power-management capabilities:
- New power-management technology includes aggressive voltage scaling and three low-power modes: idle, drowsy, and sleep. The new drowsy mode attains nearly as low a power state as sleep while enabling the instant recall of internal device states for instant-resume capability.
- Clock-gating is extensively used throughout the processor. Clock-gating, also known as demand clocking, clocks off sections of the processor that are not in use, such as between keystrokes during data entry, with instant resumption on-demand.
Intel's Goal: Maintaining "MIPS/milliWatt Leadership"
Intel is making a significant investment in developing its portfolio of StrongARM products with industry-leading MIPS per milliWatt in two ways. It's enhancing products based on the existing SA-1 core, and it's maintaining software compatibility and broad-based tools support in the next generation of extremely lowpower and high-performance StrongARM solutions.
Next-generation StrongARM technology will enable the industry to easily transition to devices that meet the growing demand for a new generation of flexible, high-performance, extremely low-power Internet access and Internet backbone products. It makes Intel's StrongARM processors the right choice for low-power, high performance applications today and tomorrow.
About the Author
Allen Hyman is the marketing manager for Embedded Applications in the StrongARM product line. He is responsible for market development and promotion of StrongARM products and platforms in the embedded market segment.
For More Information
For information on current StrongARM products, including the recently announced SA-1110 and SA-1111 devices, documentation, and product data, visit Intel StrongArm Processor Web site.
To review the May 4th press release announcing the next-generation StrongARM Architecture implementation visit Intel's pressroom Web site.
Note: ARM and StrongARM are trademarks of Advanced RISC Machines, Ltd. Third-party brands and names are the property of their respective owners.
© 1999 Intel Corporation