Original Document

Sun Microsystems Response To Merced


What is Sun's overall response to the Merced announcement?

Intel did not give any details on the Merced chip, but instead gave a superficial discussion of very general concepts about Very Long Instruction Word (VLIW) machines. It looks like everyone will have to wait until "1999" to get an indication from Intel on exactly what Merced will be.

What does Sun think of Intel's "new" architecture?

Again, Intel did not say much, but from what was presented, this was not a huge technological unveiling. The VLIW architecture Intel described has been in academia since the early 1980's. Most of the good ideas presented by Intel have already been incorporated into Sun's V9 architecture -- we have significant experience with these techniques and have been incorporated them appropriately over the past several years.

How will Intel's new two architecture product line impact its customers?

Intel's customers must now choose between one of Intel's two architectures. This really creates opportunities for other companies like Sun to win these designs. Also, Independent Software Vendors (ISVs) will be significantly impacted since they may have to port their software to one or both architectures.

Why does Intel represent Merced as suitable for the workstation/server market?

This is unclear! Industry leaders would agree that multiprocessing capability, memory bandwidth and performance metrics are the most important issues in the workstation/server world and Intel was unwilling to disclose these details at this time. Intel described Merced as their first 64-bit chip, but little else. Sun, on the other hand, has recently unveiled its third generation 64-bit processor, the fully compatible UltraSPARC-III, that was designed to continue its leadership position in the workstation/server marketplace. Managing their customers' transition to this new architecture will be a big undertaking for Intel.

Software and Hardware Compatibility

Intel indicated that Merced will be "completely compatible" with existing 32-bit architectures and with PA RISC but did not disclose details to prove this statement.

At what performance penalty will Merced be fully compatible?

Anytime you have translation in hardware or software you pay a penalty. At the raw hardware level, the comments Intel were not clear. The code may run, but Intel said x86 performance on Merced will be slower than the fastest IA-32 implementations. Merced won't maintain performance levels on x86 compatible codes.

This compatibility may be technically possible, but is its business-model practical? Sun's UltraSPARC-III will be completely binary compatible for both operating system and application software.


What about Merced is uniquely scalable?

Unlike prior Intel processors, Merced may actually scale beyond 4-way processor systems. Although Intel made scalability claims, they gave no details to support these claims. Sun, on the other hand, is currently shipping the most efficient scalable machines (with 64-processors) in the industry. Sun also provided significant details to prove that its new UltraSPARC-III processor will scale up to 1000+ processors in a single coherent system.

Process Technology

Intel indicated they will be manufacturing Merced on .18 micron technology, but made no reference to the clock speed they could reach. One could surmise that .18 micron technology is required simply to handle the complexity in terms of sheer transistor count that has been introduced by this architecture. In contrast, Sun is on plan to achieve 600+ MHz for the UltraSPARC-III on .25 micron technology and has readied plans to move quickly to .18 micron.


In all systems the compiler is a key element since everyone needs a great optimizing compiler in order to obtain the best possible performance. What is different with Merced?

One of the guiding forces behind RISC architecture was to simplify hardware by putting more work in the compiler. Merced is following this RISC idea by off-loading extensive work to the compiler. Sun believes the compiler issue will be more difficult for Intel to manage than it will be for others because they've off-loaded to the compiler part of the work that was previously done by hardware. It is not clear if the compiler will be able to detect all the explicit parallelism Intel claims.

Also, one of Intel's key points was to highlight Merced's use of speculation and predication in the instruction set architecture as if they were new. However, these concepts have been used for several years by Sun and other leading processor and compiler companies.


How does Intel address parallelism and multiprocessing?

Intel did not share significant details about parallelism and multiprocessing as related to Merced. We do know that Intel has a steep learning curve here since uniprocessor systems are their sweet spot. Intel must be devoting significant resources to an area where they will have to learn a significant amount.

How does Sun address parallelism and multiprocessing?

Given the fact that we have the premier design win in the server space with our sister company, Sun Microsystems Computer Corporation, we are able to address parallelism at both the chip level and system level. Sun has the right number of execution units on chip and the right balance in terms of architecture. Off-chip, Sun is providing processor scalability support specifically designed for multiprocessor systems. Sun is currently shipping 64-way systems and expects to continue at the leading-edge of technology.

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