Jack Ganssle wrote an article on the continued demand for 4 and 8-bit microcontroller.  Every year the ‘experts’ and sales people claim will be the end of the 8-bit microcontroller.  Companies have strived to make upgrade paths to 32 bit.  But the fact remains, basic microcontrollers, sold for pennies, are all that is needed for the majority of applications, applications that we use everyday without a single thought of the processor in it.

Ken Olson, head of Digital Equipment Corporation, said in 1977 (six years after the first commercially-successful microprocessor was introduced) “There is no reason anyone would want a computer in their home.”

Count the processors in your home and ponder that statement.  Unless you live in a cave you do not have enough fingers and toes to count all the computers in your home.  Its a good read, check it out.

Original Intel 6MHz 80186 Made in 1984

2012 marked the 30th anniversary of the introduction of the Intel 80186 and 80188 microprocessors.  These were the first, and arguably only, x86 processors designed from the beginning as embedded processors.  It included many on-chip peripherals such as a DMA channels, timers and other features previously handled by external chips.  Initially released at 6MHz, clock for clock many instructions were faster then the 8086 it was based on, due to hardware improvements.

In 1987 Intel move the 186 to a CMOS process and added more enhancement including math co-processor support, power down modes and a DRAM refresh controller.  Speeds were increased up to 25MHz (from the 10MHz max of the NMOS version).  Through the years Intel continued to developed new versions of the 186 with added features, lower voltages, and different packages.  It was not until 2007 that Intel finally stopped production of the 186 series.  It continued to be made by others under license including AMD, who made versions running up to 50MHz.  Fujitsu and Siemens also produced the 186 series. Like the 8051 the 186 gained significant support, being embedded in millions of devices.  The instruction set was familiar, debugging and development systems were (and are) plentiful so the 186 core continues to be in wide use.

As IC complexity and transistor counts increased the need for a processor core that could not just be embedded into a system, but be embedded into a custom ASIC or SoC became apparent. IC’s were being designed to handle things like DVD playback, set-top boxes, flat panel control and more.  These applications still required some sort of processor to handle them but having to have a separate IC for it was not economical.

pixelworks PW166B – 67MHz Tubro186 based Flatpanel Controller made in 2004

VAutomation (founded in 1994) designed Verilog and VHDL synthesizable cores (meaning they could be ‘dropped’ into an IC design or FPGA).  In November 1996 VAutomation licensed the 8086/8, 80186/8 and the CMOS versions from Intel.   This gave them them ability to design their own compatible models of these processors without fear of litigation.  More importantly it allowed them to sub-license these designs to others.  In 1997 VAutomation demo’d their first 186, the V186 core.  This was a Intel 80186 compatible core that could be synthesized into a customers design.  It was ‘technology independent  which means it was not restricted to a certain process or even technology.  It could be used in CMOS, ECL, 0.35u, 1 micron, whatever the client needed.  On a 0.35u CMOS process it was capable of speeds in excess of 60MHz, and did so with less then 28,000 gates. One of the first licensees was Pixelworks, which made controllers for monitors.  Typical licensing was a $25,000 fee up front and royalties on a per device basis usually split into a high volume (over 500,000 units) and low volume.  Typical price per chip was $0.25-$2.00, which was cheaper then the $15 price Intel was charging for a discrete 80C186.

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Intel 48 core Single Chip Cloud Processor

Recently two companies announced 48 core processors.  Intel announced they are working on a 48 core processor idea for smart phones and tablets. They believe it will be in use within 10 years, which is an eternity in computer terms.  Meanwhile Cavium, makers of MIPS based networking processors announced a new 64bit MIPS based 48-core networking processor.  The Octeon III, running at 2.5GHz is expected to beginning shipping soon.  Cavium already makes and ships a 32 core MIPS processor.  So clearly multi-core processors are not something we need to wait 10 years for.

Tilera, another processor company, is ramping up production of the TILE-Gx family.  This processor running at 1-1.2GHz supports from 9 to 100 cores (currently they are shipping 36 core versions).  NetLogic (now owned by Broadcom) made a 32 core MIPS64 processor and Azul Systems has been shipping a 54 core processor for several years now.  Adapteva is now shipping a custom 64 core processor (the Epiphany-IV).  This design is expected to scale to many thousands of cores.

Why is this all important?

Tilera multi-core wafer

While your personal computer, which typically is running a dual, or quad core, or perhaps even a new Intel 10 core Xeon is practical for most general computing, these processors are not adequate for many jobs.  Ramping up clock speed, the GHz wars, was long thought to be the solution to increasing performance in computing.  Just making the pipe faster and faster, and reducing the bottlenecks that fed it new instructions (memory, disk, cache, etc) was the proposed solution to needing more performance.  To a point it worked, until a wall was hit, that wall was power and thermal requirements.  With increasing clock speed processors ran hotter and began drawing immense amounts of current (some processors were pulling well over 100 amps, albeit at low voltage).  This was somewhat alleviated by process shrinks, but still, the performance, per watt, was decreasing.

Many computing tasks are repetitive, do the exact same thing to each of a set of data, and the results are not interdependent  meaning A does not have to happen before you can do B.  You can perform an operation on A, B and C, all at once and then spit out the results.  This is typically true of processing network data, processing video, audio, and many other tasks.  Coding and compiling methods had to be updated, allowing programs to run in many ‘threads’ which could be split amongst many cores (either real or virtual) on a processor, but once done, the performance gains were tremendous.

Clearspeed CSX700 192 cores @ 250MHz

This allows a processor to have increased performance, at a relatively low clock speed.  Work loads can also be balanced, a task that does not lend itself to parallelism, can be assigns to a single core, while the other cores can be busy doing other work.

There are several main benefits to multi-cores:

Increased performance for parallel tasks:  This was the original goal, split a single problem into many smaller ones, and process them all at once.  That is why massively multi-core processors began in the embedded world, dealing with digital signal processing and networking.

Dynamic Performance:  Dynamic clocking of multi-core processors has led to tremendous power savings.  Some tasks don’t need all the performance on all the cores, so a modern multi-core processor can dynamically scale the clock speed, and voltage, of each core, as needed.  If not all cores are needed, they can be put to sleep, saving power. If a non-parallel task is encountered, a single core can be dedicated to it, at an increased clock speed.

Upgradeability:  If a system is designed correctly, and the code is written/compiled well, the system does not know, or care how many cores the processor has.  This means that performance can, in general, be upgraded just by swapping out the physical silicon with one with more cores.  This is common in larger super computers, and other systems.  HP even made a custom Itanium, called the Hondo MX2 that integrated 2 Madison cores on a single Itanium module.  This allowed their Superdome servers to be upgraded with nothing more then a processor swap, much cheaper then replacing the entire server.

Not all tasks are easily handled in a parallel fashion, and for this reason clock speed is still important in some applications where B cannot happen until A is complete (data dependencies).  There are, and will continue to be systems where this is the focus, such as the IBM system Zec12 which runs at a stunning 5.5GHz.  However, as power becomes a more and more important aspect of computing, we will continue to see an ever increasing number of cores per chip in many applications. Is there a limit?  Many think not, and Intel has made a case for the use of 1000+ core processors.

In 2003 Renesas Technology was formed as a joint company between Hitachi and Mitsubishi, combining their semiconductor operations.  In 2010 Renesas Electronics was created by the merger of NEC Electronics, and Renesas Technology.  This created the largest supplier of microcontrollers in the world, combining the product portfolios of NEC, Mitsubishi and Hitachi.  This allowed them to stop competing amongst themselves, and compete with Samsung, Infineon and other suppliers.

Renesas ended up with the following microcontroller families:

• Hitachi: H8, H8S, H8SX, SuperH
• Mitsubishi: M16, M32, R32, 720, 740
• NEC: V850, 78K

Hitachi SH-3

One of the largest markets for these microcontrollers (and associated other parts) is the automotive industry, with today’s vehicles containing, on average, $350 in just IC’s per car.  $350 may not sound like much when a car costs $20,000, but the Average Sale Price (ASP) per component, is 33 cents, meaning there are, on average, over 1000 IC’s in a modern car, of which 50-100 are microcontrollers.  They do everything from run the stereo, to monitor and adjust engine parameters.  As more features (entertainment, navigation, stability control, etc) are added, the count goes up.

The market downturn in 2008-2009 hit the automotive industry, and is suppliers very hard.  With very small profit margins this hit Renesas very hard as well.  Combined with increasing competition from Samsung  Renesas has been driven into high levels of debt, and a distinct lack of profitability.

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Back in 2010 we did a write up on the many processors in each iPhone for each version through the iPhone 4.  Since then Apple has released the iPhone 4 (CDMA) and the mid-cycle refresh iPhone 4S.  Seeing as the iPhone 5 should be released on September 12th here is a quick update to bring our table up to date.

CPUs by function and generation of iPhone:

Apple iPhone 4 CDMA

The CDMA version of the iPhone 4 switched from an Infineon X-Gold baseband to a Qualcomm MDM6600 running a 512MHz ARM1136JS core.  Interestingly this baseband supports GSM but due to antenna issues it is not implemented here. The Qualcomm Gobi, as it is known, also has integrated GPS, removing the need for the old Broadcom BCM4750.  This sets the stage for the iPhone 4S.

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z12 MCM Layout

“We are hitting the limits of physics in many cases”  These words, spoken by an IBM engineer about the new zEnterprise EC15 mainframe do well to describe the processor that runs it.  The z12, as we’ll refer to this processor, replaces the z196 as IBM’s top performer.  The z196 ran at a slothly 5.2GHz, the fastest commercial processor in the world until now.  The z12 runs at 5.5GHz and was designed to be clocked up to 6GHz.  It is made on a 13layer 32 nm High-K process (the z196 was made on a 45nm process).  This allowed a doubling of logic and cache density.

The EC12 is designed  with single thread performance in mind.  While many systems today focus on massive parallelism, and optimizing code for multi-threading, some tasks do not work well that way, data analytics, batch processing etc, are fundamentally serial processes, so less cores, and more speed per core is far more important.  The z12 is based on a MCM (Multi-chip module) that contains 6 Processing Units (PUs) and 2 Storage Controllers (SC, which contain 196MB of L4 cache each) for a total of 8 dies on each MCM.  Each PU contains 4, 5 or 6 active cores.  The MCM is a 103-layer glass ceramic substrate (size is 96 x 96 mm) containing eight chip sites and 7356 land grid array (LGA) connections.

IBM zEC12 6-core PU – 2.75 Billion Transitors – 5.5GHz

Each PU chip has 2.75 billion transistors. Each one of the six cores has its own L1 cache with 64 KB for instructions and 96 KB for data. Next to each core resides its private L2 cache, with 1 MB for instructions and 1 MB for data respectively.

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Out of the annuls of history comes this interesting computer on eBay.  PIXAR made around 300 of their Image computers during the late 1980s, hoping they would be a commercial success, as well as useful for their own render work.  While they proved to be very good at what they did, they were a bit ahead of their time, and certainly out of the price range of most institutions.  The first models started at $130,000 and the PII, as seen on eBay, was sold for $30,000.  PIXAR began trying to sell their computers two months after Steve Jobs bought the company (formerly LucasFilm graphics division).

Each system ran 1, 2, or 4 CHAPs (CHAnnel Proceesors, RGBA).  Each CHAP consisted of a board with 4 AMD 29116 16-bit bipolar bit slice microprocessors, running at 10MHz supported by 4 Logic Devices LMU17 16 x16 parallel multipliers.

AMD AM29116 16 bit microprocessor

Essentially the PIXAR Image Computer was a 1980s GPU, it required a separate SGI or Sun workstation to run.

Traditional microprocessor transistors are "planar" or flat as they pass through the switching gate

April marked the 50th anniversary of Robert Noyce’s patent on making silicon IC’s with a planar process, a concept that has changed little since then.  That is, until this month, when Intel announced their new 22nm process, a process that will not be restricted to planar transistors.  Intel, like Hollywood as of late, has gone 3D, Instead of a transistor being built in planes (layers) Intel has developed a way to produce transistors with source/drain spanning several planes on the die, essentially they are formed vertically, rather then horizontally.

This in an of itself is not remarkable, it has been thought of, and done before. What Intel did is make it happen on a commercially viable process.  Intel claims to be able to initially manufacture these on a commercial scale at only a 3% cost increase over traditional planar processes, and of course expects that 3% added cost to drop to zero, or in fact result in a cost savings, as the process is refined.

The Tri-Gate system features 3D "fins". This allows the same surface area, in a smaller die area.

What this allows is 2-3 times the number of transistors in the same space as a planar process (assuming the same process size).  Intel plans to use this process for the 22nm node. Intel’s first processor, the 4004, was constructed on a 10 micron process with 2300 transistors.  Thats 500,000 times larger features and over a million times less transistors, yet it consumed almost a 1 watt of power.  With Intel’s new 3-D 22nm process it should give Intel the break they need into the mobile phone market, a market they have been desiring to reenter ever since selling off their mobile ARM (PXA//StrongARM) division to Marvell several years ago.

Now the UBM Techinsights and iFixIt have completed their teardowns of the iPad 2, and benchmarks have been run we now know that the A5 is in fact a dual core, made by Samsung, and clocked at around 900MHz.  It also includes the PowerVR 543 dual core GPU as we suspected in our previous post.

Apple A5 Processor

Also we now have an actual image of the chip, rather then the photoshopped one Apple used in their presentation.

Apple A5 - Actually a Photoshop'd A4

Today Apple announced the iPad 2, which unless you are living in a cave, you likely have heard about more then you wish already.  The iPad 2 debuts the next evolution in Apples own ARM processor.  The A4 (which was a single core 1GHz class ARM Cortex-A8 made by Samsung) is out, and a dual core replacement is in.  Details are thin until a proper tear down is done, but it is most likely a 1GHz dual core ARM Cortex-A9 with a dual core PowerVR 543 replacing the single core PowerVR 535.  It is most likely fab’d again by Samsung.  Apple’s press shot during their presentation is NOT an A5, the PR folks at Apple simply Photoshopped the original press shot of the A4 from last year. Note the date codes on the chip are 0939 and 0940 (sine their is 2 dies in it), which is late 2009.

Apple also made the somewhat deceptive remark that the iPad 2 is the first dual core tablet to ship ‘in volume.’  HP’s Touchpad runs a dual core Snapdragon and is shipping ‘soon.’  LG is shipping their tablet this month with a very capable Tegra 2, and Samsung will follow with the Galaxy Tab 10.1, also Tegra 2 powered.  RIM’s Playbook which is in beta, used a TI OMAP 4430 dual core Cortex-A9.  This puts Apple right in the mix of the dual core frenzy that will playout this year.

Apple A4 Press shot, notice the identical markings to the A5

We’ll update the photo as soon as someone (likely the folks at iFixIt) get and tear one down.