Modified: March 13, 2005, 11:48 am
Model:AMD-K5 PR100
Data Code:9634
Transistors:4.3 Million
Process:0.35 Micron
Architecture:32 bit x86 w/ FPU ontop of RISC
Used in:Computers
Description:Of all the x86 processors announced, AMD's is the
most architecturally interesting, diverging
radically from the approach taken by Pentium's
designers. At its heart, the K5 isn't an Intel-
compatible chip at all - it's a RISC processor
somewhat akin to AMD's superscalar AM29000 chips.
However the RISC core and its instruction set
(called ROPs - pronounced ar-ops)is hidden from
the end user. Instead, x86 instructions are
converted into these RISC operations which are
then handled by six parallel execution units:
one floating point unit, two integer units, two
load/store units and a branch unit. It is an
approach similar to NexGen's Nx586, however AMD
has included some extra technology at the
beginning of the translation process, which the
company claims will allow up to four x86
instructions to be despatched concurrently.
This is pushing it a bit, since only the very
simplest x86 instructions will map directly onto
an ROP. "Simplest" in this case, equates to
instructions such as register-to-register adds.
Most operations take two or three.

The K5 was Pentium Rated (PR) to how fast of a
Pentium it was equivalent to. Earlier chips, like
this one, did not have the heatslug.