Fairchild F9450 – 1985 – 10MHz

In 1980 the United States Air Force published a standard for a 16-bit Instruction Set Architecture (ISA) to meet their needs for computers on fighters etc.  This standard is known as MIL-STD-1750A and laid out what the processor needed to be able to do, but not how, or what would be used to accomplish it.  This allowed manufacturers to implement the standard in anyway they wanted.  It could be done in CMOS, Bipolar, SoS, GaAs or even ECL.  It was designed (like the Signetics 8X300 and the Ferranti F100) with real time processing in mind, similar to what we would call a DSP today.

Many companies made 1750A compatible processors including Honeywell, Performance Semiconductor (now Pyramid), Bendix (Allied), Fairchild, McDonnell Douglas, and others.  The processors ended up finding uses in many things outside of the USAF, including many satellites and spacecraft including the Mars Global Surveyor.  The standard was not restricted to military use, in fact commercializing it was encouraged, as this would increase production, which would help decrease costs for the military.

Fairchild designed the F9450 to meet both the commercial, and military markets.  Initial availability was in 1985 and the F9450 provides an on-board floating point unit, an optional, second chip, on other implementations.  Fairchild also made a F9451 MMU (Memory Management Unit), and a F9452 BPU (Block Protection Unit).  The 9450 was manufactured in a bipolar process (Fairchild called it I³L for Isoplanar Integrated Injection Logic).  This helped boost speed, as well as greatly increased reliability, as bipolar is much less susceptible to higher radiation levels then CMOS is.  Bipolar processes also generate heat, lots of it and to help counter this Fairchild used a somewhat unusual (for a processor) ceramic package made of Beryllium Oxide (BeO).  BeO has a higher thermal conductivity than any other non-metal except diamond, and actually exceeds that of some metals. Normally the ceramic on a CPU package is some form of Alumina (Al2O3).  Beryllium itself is a carcinogen so grinding, or acid application on BeO is not recommended.  The bottom of the the 9450 was made with a different ceramic, as the goal was to get the heat away from the chip, and not back into the PCB.  9450s were available in speeds of 10, 15 and 20MHz and in Commercial, or Military temperature rating.  MIL-STD-883 screening was of course available.

By 1996 the 1750A architecture was declared inactive and not recommended for new designs.  However, due to its extensive software support, reliability, and familiarity, it enjoys continued use, and is still being manufactured by several companies.

AMD AM27C2048-150DC – 3 Dies (Click to view larger)

In the semiconductor industry process shrinks are highly sought after.  They result in smaller die sizes for the same part, which results in more chips per wafer, thus increasing revenue.  There are other benefits (typically speed increases and power decreases (aside from leakage)) but from a purely economical stand point, the smaller dies result in more profits.

Rarely do you get to SEE the result of these process changes.  UV-EPROMs fortunately have a window, for erasing them with UV light, that also lets the die be seen.  Here are three AMD AM27C2048 EPROMs.  These are CMOS 2-Mbit EPROM, pretty common in the 1990s.  As you can see that while they are all the same part, the dies are significantly different. While its hard to say for sure without a die analysis, we can make some good estimations based on what foundries AMD had at the time these devices were made.  The first EPROM is date late 1993 which will likely be a 1 micron process.  The second EPROM, dated mid 1997 is a bit smaller, around 20% smaller, which fits with AMD’s 0.8 micron fabs.  The last, and latest, EPROM was made in 1998, likely at the joint AMD-Fujitsu (FASL) plant in Japan.  This would mean it is a 0.5 micron device. The plant was transitioning to 0.35 micron at the time, but that was most likely used for the higher profit Flash memory devices.  By 1998 EPROM’s were on the decline.

Also of note is the different copyrights.  The first two are copyright 1989 while the third is 1997.  Its hard to know for sure (I do not have the microscopes/tools needed to do die analysis) but it is likely the 1 micron to 0.8 micron was an optical shrink. Literally this means that the die (and masks) are scaled down to a new smaller process with no architectural changes.  This is simple and inexpensive.  Sometimes changes will have to be made to support a new process, or make full use of its benefits, so a new layout/masks are made.  This is likely the case with the 1997 copyrighted EPROM.  The design was altered to work with the new, smaller process, and it was significant enough to warrant a new copyright.

MicroModule Systems GV1-D0-3S-60-120A 120MHz (top side)

MicroModule Systems (MMS) began operations in 1992, following the completion of an agreement to acquire the assets and license rights to the technology of Digital Equipment Corporation’s MCM (Multi-chip Module) engineering and manufacturing business in Cupertino, California. The MicroModule Systems vision was to lead the next wave of electronic integration technology. Previous waves have been: discrete components (1950s), integrated circuits (1960s), large-scale integration (1980s), and system on a chip (mid 1990s).

The MMS Gemini was a module, that includes the National Semiconductor chipset die (x2) , a P54CSLM Pentium die, tag RAM, and cache RAM (128Kx2) as well as an LM75A temperature sensor for thermal management.   MMS used Intel D0 revision P54 processors (with the exception of some early C0 die), a stepping Intel never packaged themselves (it was solely used for the ‘known good die’ program).  When Intel discontinued selling fully tested dies, MMS had no way to build the Gemini and later MMX modules, so in 1998 went out of business. The Gemini was used in many mobile, and rugged PC applications such as the Motorola MW520 Computer used in many police cars.

MMS also produced MCM modules for ROSS, used to make the HyperSPARC processor as well as the Intel Pentium Pro 1MB MCM.   For a company that was only in existence for 6 years, their impact was tremendous. MMS was not alone in their production of Intel Pentium Processor modules…

Fujitsu also made modules using Intel dies.  These were again used in rugged PC applications, laptops, and industrial computers.

Fujitsu MRN-3546 120MHz

Fujitsu made 100, 120, 133, and MMX processors on a MCM type package where the individual components are bonded/soldered to a ceramic substrate (rather then the PC Board)

MME U552D – Plastic 1702

Today’s EPROM is a very rare early prototype from MME (VEB MikroElektronik “Karl Marx” Erfurt ).  Part of the East German state-owned electronics business.  MME (and their predecessor FWE) made clones of Intel 1702, 2708-2764 EPROMs as well as many processors.  These were all unlicensed, reverse engineered, or copied via industrial espionage since this was all before the end of the USSR, and the technology blockade put in place to ‘prevent’ Eastern Europe from using Western technologies.  This particular U552D is a clone of an Intel 1702A, however, it is made in a plastic package (with what appears to be a actual quartz window).   A very unusual package that was used in Soviet devices mainly and very rarely in the west.

The only western EPROM I have found in plastic is a prototype TMX2532-35NL from Texas Instruments (thus the TMX prefix).

However, the MME U552D actually has the window glued to the top of the plastic package, rather then integrated into it like the TI, and the Soviet designs.

Back in 2010 we did a write up on the many processors in each iPhone for each version through the iPhone 4.  Since then Apple has released the iPhone 4 (CDMA) and the mid-cycle refresh iPhone 4S.  Seeing as the iPhone 5 should be released on September 12th here is a quick update to bring our table up to date.

CPUs by function and generation of iPhone:

Apple iPhone 4 CDMA

The CDMA version of the iPhone 4 switched from an Infineon X-Gold baseband to a Qualcomm MDM6600 running a 512MHz ARM1136JS core.  Interestingly this baseband supports GSM but due to antenna issues it is not implemented here. The Qualcomm Gobi, as it is known, also has integrated GPS, removing the need for the old Broadcom BCM4750.  This sets the stage for the iPhone 4S.

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A Brief History

Long before the mess of Apple vs. Samsung (and seemingly everyone else), there was another famous company, with a patent in hand, that it seemed everyone was violating.  The issue of Intellectual Property (IP), and its associated patents has long been an issue in the technology business, and certainly in the business of CPU’s.  There are many many functions inside a CPU, different structures for handling instructions, memory access, cache algorithms, branch prediction etc.  All of these are unique, intellectual property.  It doesn’t matter if you implement them with a slightly different transistor structure, as long as the end product is relatively the same, there is the risk of violating a patent.  Patents are tricky things, and litigating them can be very risky.  You must balance the desire to keep competition from violating your IP, but at the same time minimize the risk that your patent is declared invalid.  This is why most cases end up in an out of court settlement, usually via arbitration.  Actual patent jury trials are fairly rare, as they are very expensive and very risky to all parties involved

Infringing?

In the early days (1970’s and early 1980’s) there was routine and widespread cross licensing in the industry.  Many companies didn’t have the fab capacity to reliably meet demand (IBM wouldn’t purchase a device unless it was made by at least 2 companies for this very reason) so they would contract with other manufacturers to make their design.  Having other companies manufacture your design, or compatible parts, also increased the market share of your architecture (8086, 68k etc).  For years AMD made and licensed most everything Intel made, AMD also licensed various peripheral chips to Intel (notably the 9511/2 FPU).  As the market grew larger, the competition increased, Intel (and others) began to have enough reliable fab capacity to safely single source devices.  Meanwhile other companies continued to make compatible products, based on previous licensing.  AMD notably made x86 CPU’s that ate into Intel’s market share. In the 1970’s Intel had cross license agreements with AMD, IBM, National, Texas Instruments, Mostek, Siemens, NEC and many others.

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z12 MCM Layout

“We are hitting the limits of physics in many cases”  These words, spoken by an IBM engineer about the new zEnterprise EC15 mainframe do well to describe the processor that runs it.  The z12, as we’ll refer to this processor, replaces the z196 as IBM’s top performer.  The z196 ran at a slothly 5.2GHz, the fastest commercial processor in the world until now.  The z12 runs at 5.5GHz and was designed to be clocked up to 6GHz.  It is made on a 13layer 32 nm High-K process (the z196 was made on a 45nm process).  This allowed a doubling of logic and cache density.

The EC12 is designed  with single thread performance in mind.  While many systems today focus on massive parallelism, and optimizing code for multi-threading, some tasks do not work well that way, data analytics, batch processing etc, are fundamentally serial processes, so less cores, and more speed per core is far more important.  The z12 is based on a MCM (Multi-chip module) that contains 6 Processing Units (PUs) and 2 Storage Controllers (SC, which contain 196MB of L4 cache each) for a total of 8 dies on each MCM.  Each PU contains 4, 5 or 6 active cores.  The MCM is a 103-layer glass ceramic substrate (size is 96 x 96 mm) containing eight chip sites and 7356 land grid array (LGA) connections.

IBM zEC12 6-core PU – 2.75 Billion Transitors – 5.5GHz

Each PU chip has 2.75 billion transistors. Each one of the six cores has its own L1 cache with 64 KB for instructions and 96 KB for data. Next to each core resides its private L2 cache, with 1 MB for instructions and 1 MB for data respectively.

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Shugart SA400 Floppy Drive

The HP Input Output Blog has a nice write up on the floppy disk/drive.  A very interesting read about a device many took for granted, and many of today’s generation did not ever get to experience.  Many do not realize its humble beginnings, and the importance that Steve Jobs, ‘the bum in the lobby,’ played in the 5.25″ floppy becoming a standard.  The 5.25″, holding twice what a 8″ floppy could, was developed by Shugart Associated in 1976.  Shugart went on to become Seagate, known today for their hard drives.  Hard drives that can store over 2 Terabytes of information.  The original 5.25″ floppy? 160K, per side.  An 8 inch? 80K a side.  Interestingly enough, it was sometime before the Floppy Drive Controller (FDC) was integrated onto a single chip.  Many original Shugarts used an Intel 8080 CPU for drive processing.  The Commodore 64’s famous 1541 Floppy Drive ran its own 6502 type CPU, and was designed in such away you could actually load code directly to the floppy drive 6502.  In the 1990’s attempts were made to increase the capacity, speed, and versatility of the floppy.  Apple created a 2.88MB 3.5 inch floppy that never really caught on.  There was the LS-120 drive which could use normal 1.44MB disks as well as special 120MB disks (was handy, but so few people had them, they had limited use).  Ultimately, like most all technology the floppy has passed by the way side, today’s floppy is the USB Flash drive, holding many gigs of data for only a few dollars.  And like the floppy, flash drives are used commonly for sneakernetting files around the office.  Perhaps the mbile version of the floppy is the Micro-SD card, remember when Sony built a camera with a 1.44MB floppy drive built in?  Not een large enough to store the picture from a cell phone camera today.

Head on over and check out the article, its a fascinating story….

Yesterday Hans Camenzind passed away at the age of 78.  Hans was a notable inventor of Swiss decent.  Perhaps the most famous of all his inventions occurred in 1972 while working on a contract with Signetics he invented the 555 Timer chip, a simple oscillating IC that was inexpensive, and easy to build with.  Now, even 40 years after its introduction, around a billion per year are still made, by dozens of companies around the world.  The 555 Timer is often one of the very first IC’s electronics hobbyist begin experimenting with.  Its applications are far reaching and while certainly not a CPU, its significance, and that of Camenzind, should not be forgotten.

The 555 Timer has of course been used in many many computers, notably in the Apple II computer as a joystick controller (558 Timer, which is a quad 555).  Other uses include the IBM PC, Ataris, and many many more. In honor of Hans Camenzind, and the 555 Timer, go experiment with one and experience the joys of a device over 40 years old. Dont have one? They cost a whopping $0.95 at Sparkfun.

The Spacecraft CPU page has been updated, after a long gap.  It now includes information of the recently landed Curiosity Lander, some new information on the 45 year old Voyager series as well as some on New Horizons, DAWN, and several others, so check it out.

BAE RAD750 Single Board Computers

The Curiosity (and Mars Reconnaissance Orbiter,) Run a BAE RAD750 @ 200MHz