Intel 3101 Memories, from late 1969 early 1970.

Today when we think of Intel, the ‘processor company’ comes to mind.  It was now what they are best known for, but when Intel began in 1969 they did not make processors, they made memory, specifically SRAM, DRAM, and EPROMs.  The very first product Intel released, in April of 1969, was the 3101 64-bit SRAM.  It was made on the new, and fast Schottky Bipolar process.  This made it very fast (access times of 60ns) but very power hungry.  It dissipated 525mW, over half a watt, for 64-bits of memory.

Two months later Intel released the 1101, which was developed at the same time as the 3101.  It was made on a PMOS process, which allows much greater densities, the 1101 was 256-bit SRAM chip.  The sacrifice is speed, the 1101 is a bit slow, with access times of around 1.5us.  Operating power was 700mW but in standby mode it only drew 350mW.

Very Early Burroughs “D” NanoMemory board with 32 Intel 3101 memories (picture from Evan Wasserman )

Computer makers were eager for single chip memories, they allowed for more dense memory systems.  One of the first users of the 3101 was Burroughs in their ‘D’ machine, a computer designed for the Air Force in 1969.  It used 3101s for its ‘nanomemory’ organized as 64×56 bits (needing 56 3101s if they were used for all the nanomemory.  Other notable users was in implementing the stack in the Datapoint 2200.  The 2200 is the grandfather of x86, its architecture was the basis for the Intel i8008, which then led to the 8080 and 8086 processors.  The first Xerox Alto’s also used the Intel 3101, arguably the first GUI implementation.

The 3101 evolved as Intel learned the process of making chips, and assembling them.  This is notable in looking at die shots of two 3101s with lot codes likely only a few months apart.  Ken Shirriff, a fellow collector, was donated a pair of 3101s nearly identical to those pictured, for decapping and die shots, by Evan Wasserman (who donated several to the CPU Shack Museum as well).  If addition to the package difference (not the larger lid on the later one) there is some die changes as well.  The bonding pads were made much larger, likely to ease the assembly, and the main VCC line on the top of the die was made smaller.  Connections to bond pads were also cleaned up and refined.  The logic of the device appears unchanged.

3101 dies. Left is lot 898, right is the later 1116. Click for much larger version. Die photos provided by Ken Shirriff

Through the 1970’s and well into the 1980’s memory devices were by far Intel’s largest revenue source.  It wasn’t until fierce competition in the memory market that this changed.  Had it not been for IBM adopting x86, things could have been much different and more difficult for Intel.  The rapid adoption of x86 gave Intel a new revenue stream, and one that was less likely to be pressured by commodification as was happening to memory devices.

Intel D80130-3 OSP – Engineering Sample – Early 1982

A seemingly impossible occurrence today, but something that Intel has faced in the past.  It is common for customers to need chips that are no longer in production, either for repair of legacy systems, or to keep an old but reliable design in production.  Typically these parts can be sourced on the secondary market, or from End-of-Life suppliers such as REI, or InnovASIC.  But what happens when Intel themselves needs a chip that they previously made, but no longer do?

Such was the case with the 80130 Operating System Processor.  The 80130 was a co-processor designed in 1981, to make use of Intel’s high-density ROM capabilities.  The 80130 contained 16K of ROM, 3 timers (compatible with 8254), an interrupt controller (similar to the 8259), and a baud-rate generator.  It was capable of bus management and control and could directly control an 8087 FPU as well.  These are designed to work with the 8086/88 and 80186/188 processors.  The 16K of ROM was coded with 35 Operating System primitives (a subset actually of the Intel iRMX86 RTOS (Real Time Operating System).  This firmware allowed easier support for the constructs typically used in a multitasking OS.  Essentially the 80130 extended the instruction set of the x86 to include higher level OS functions.

Intel D80130-2 – 1983 – Production version (though datasheets continued to be marked ‘Preliminary’ though its entire life)

The original version, called (for no known reason) the 80130-3 was released in engineering sample versions only.  It could run at up to 8MHz allowing it to work with any of the x86 processors of the time.  After some small timing adjustments, the 80130 was released to production as the 80130-2, still keeping with the 8MHz max.  Later references show a 80130 at 5MHz as well as the 8MHz -2 part.  However, the 5MHz part has not been seen (as of this writing) and is likely to exist only in datasheets.

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Intel A80486DX SXE19 Engineering Sample – May 1989

The Intel 80486 was announced at COMDEX in April 11th 1989, justy 3 years after the 80386 hit the market.  The 80486 was really a greatly enhanced 80386. It added a few instructions, on-chip 8KB Write-Thru cache (available off chip on 386 systems) as well as an integrated FPU.  Instruction performance was increased through a tight pipeline, allowing it to be about twice as fast as the 80386 clock for clock.  Like the 80386 the 80486 was a CISC design, in an era when the RISC processor, in its may flavors, was being touted as the future of ALL computing.  MIPS, SPARC, and ARM all were introduced in the late 1980’s.  Intel themselves had just announced a RISC processor, the i860, and Motorola had the 88k series.  Intel in fact was a bit divided, with RISC and CISC teams working on different floors of the same building, competing for the best engineering talent.  Would the future be CISC, with the 80486? Or would RISC truly displace the CISC based x86 and its 10 years of legacy?

This dilemma is likely why Intel’s CEO, Andy Grove, was nearly silent at COMDEX.  It was only 4 years previous the Mr. Grove, then as President, made the decision to exit the memory market, and focus on processors, and now, a decision would soon loom as to which type of processor Intel would focus on.  Intel eventually ditched the i860 and RISC with it, focusing on the x86 architecture.  It turns out that ultimately CISC vs RISC didn’t greatly matter, studies have shown that the microarchitecture, rather then the Instruction Set Architecture, is much more important.

Intel A80486DX-25 – SX249 – B4 Mask from Sept 1989 with FPU Bugs

Whether due to the competition from the i860 RISC team, or knowing the markets demands, the 80486 team knew that the processor had to be executed flawlessly.  They could ill afford delays and bugs.  Samples of the 80486 were scheduled to be released in the 3rd quarter of 1989 with production parts shipping in the 4th quarter.  The above pictured sample is from May of 1989, a quarter ahead of schedule.  Production parts began to ship in late September and early October, just barely beating the announced ship date.

Perhaps due to the rush to get chips shipping a few minor bugs were found in the FPU of the 486 (similar to bugs found in the FPU of the 387DX).  Chips with the B4-Mask revision and earlier were affected (SX249).   These bugs were relatively minor and quickly fixed in the B5 mask revision (SX250), which became available in late November of 1989, still within Intel’s goal of the 4th Quarter.

The 80486 was a success in the market and secured CISC as the backbone of personal computing.  Today, the CISC x86 ISA is still used, alongside the greats of RISC as well.

Intel DRAM – Likely a 2186 64K device given out during the 1983 Open House

In 1983 memory products were still Intel’s largest source of revenue.  Intel’s first product, the 3101, was a RAM, and until the memory trade wars of the early 80’s continues to be Intel’s bread and butter.  Fab 5, opened in Aloha, Oregon in October of 1978 and its primary product was memories.  EPROM’s, EEPROM’s, SRAM, and DRAM were all fab’d here, then shipped overseas, and back to Oregon for testing.  The primary testing facility for the Memory Products division was the T-5 site in Hillsboro, just a few miles from Fab 5.  T-5 tested both commercial, and military memory products up until 1985, when Intel exited the DRAM market in its entirety.

Intel Open House Chip from 1981 – Likely a 214x SRAM

These OPEN HOUSE sample chips were handed out to employees and visitors at the test site during its annual open house in 1983 (apparently in many of the open houses at that time).  Most likely this chip is a 2186A integrated RAM, a 64K DRAM made on a 1.2 micron HMOS-III process.  The 2186 was a new design for 1985 and provided a DRAM with the same pinout as a 2764 EPROM.

Just like T-5, Intel DRAMs are no more, though the Fab 5 they were made in, which was closed in 1998, was reopened to increase Flash production, the only memory product Intel still makes.  Intel’s exit of the DRAM business was certainly a risky decision back then, but it turned out to be one of the best they made.  They blamed the exit on the rapidly falling prices do to ‘dumping’ of DRAM’s and EPROMs (sold below cost) from Japanese semiconductor companies, but this allowed them to exit the DRAM business before DRAM’s turned into the commodity they are today, with margins being almost non-existent.  This allowed Intel to focus time, resources (fab capacity was in very short supply then) and money on other products, namely microprocessors and microcontrollers, they very products that have taken Intel from a one of many semiconductor company to world leader.  Perhaps they can thank those same Japanese companies they were so upset about back in 1985 for where they are today.

Intel MG80386SX16 in a 88-pin PGA

Seeing this pin out, the first processor that comes to mind probably isn’t an Intel 80386.  The 80386DX came in a 132 pin package (PGA or QFP) and the 386SX came in a 100 pin QFP.  The 386SX was the low end version of the 386.  It made do with 16 bits of Data bus, and 24 bits of Address, as opposed to the full 32-bit buses of the DX.  This accounts for 27 less pins (16 Data + 7 Address, 2 data byte selects and a 16/32 bit pin).  That covers all but 6 of the difference in package sizes.  Where are the rest from?  As with most processors, the signaling pins are not the only pins used, or not used on a package.

The 80386DX has 84 signal pins, pins that carry information to or from the processor.  It also has 40 pins for power and ground.  In the early days, when processors had only 40 pins or less, it made sense, and was feasible to have a single power and ground for the entire chip.  As complexities increased, routing became harder, and it became easier to have multiple power and ground pins to the die.  Not to mention electrically more stable, as current requirements were also increasing.  In addition the 386DX has 8 pins not used at all.  These are known as ‘No Connects.’  They are reserved for future use, or were there for testing, or simply just not needed.

Intel 5962-9453301MXA MG80386SX16 – 16MHz 80386SX – 1996 Full Milspec

Moving to the 386SX, which has 26 less signal pins (58), the standard 100 pin package used 10 No Connects and the rest (32) for power and ground.  The pictured 386SX is a late production (1996) military spec processor in an 88 pin package.  88 pins still leave plenty (30 pins) for power, ground, and no connects.  The PGA 386SX was only produced for military/industrial uses.

Why use an expensive PGA package on a low end SX processor?  The reduced bus sizes were plenty for many industrial applications while the ceramic package was much more reliable, and mechanically strong when soldered on to a board then a plastic QFP.  The PGA could work over the entire military specification, for temperature, voltage etc.  Its likely the 386SX could run on an even smaller pin count, but the PGA88 package was a standard package already in production, which often dictates how many pins a processor will have.  The same is true today, pin-count is usually driven more by what works for the package, then what the processor actually strictly needs.

Real3D VM21113C1 Prototype (likely a Pro/1000)

Much of consumer tech starts life in the labs of defense companies.  The reasons of course are simple, defense projects demand high tech, and are paid high prices by their respective governments.  Usually this tech is eventually spun off or licensed to consumer companies.  Occasionally, however, a defense company will commercialize a product on their own.  Thus was the case of Real3D.

Real3D has its roots in GE Aerospace.  GE needed to make simulators, with graphics good enough to be useful for training for a variety of systems.  Their first system was a docking simulator for the Apollo Project in the 1960’s.  By the 1980’s the technology had evolved into graphics systems for other  simulators, notably the M1 Tank.  This simulator used texture mapping graphics, which was in the world of sprites commonly used on PC’s was rather high tech. In 1992 GE sold the GE Aerospace division to Martin-Marietta who then merged with Lockheed.  Lockheed Martin wanted to commercialize the graphics work GE Aerospace has developed and thus formed Real3D Inc.  in 1995. Real3D’s first commercial success was the graphics work on the Sega Model 2 (Real3D/100) and 3 (Pro-1000) arcade systems.  Real3D also began working with SGI and Intel on a PC based graphic solution to take advantage of the new AGP bus.  This was known as the Starfighter, and later as the rather infamous Intel i740, its performance was not particularly good, but it was what Intel wanted for their entry into the value graphics market.  Real3D also had the Pro-1000 whose performance was much better but it never made it out of the development stage.

In 1999 Lockheed closed Real3D and sold its assets (mainly IP)  to Intel.  The i740 was withdrawn from the market in 1999 as well, but its technology, and that of Real3D continued to be used by Intel in their integrated graphics chipsets (notably the i810 and i815), surviving still to this day.  While no competitor to AMD/Nvidia Graphics it still is enough for most computing.

Intel A80501-60 SX753 – Early 1993 containing the FDIV bug

In 1994 Intel had a bit of an issue.  The newly released Pentium processor, replacement for the now 5 year old i486 had a bit of a problem, it couldn’t properly compute floating point division in some cases.  The FDIV instructions on the Pentium used a lookup table (Programmable Logic Array) to speed calculation.  This PLA had 1066 entries, which were mostly correct except 5 out of the 1066 did not get written to the PLA due to a programming error, so any calculation that hit one of those 5 cells, would result in an erroneous result.  A fairly significant error but not at all uncommon, bugs in processors are fairly common.  They are found, documented as errata, and if serious enough, and practical, fixed in the next silicon revision.

What made the FDIV infamous was, in the terms of the 21st century, it went viral.  The media, who really had little understanding of such things, caught wind and reported it as if it was the end of computing.  Intel was forced to enact a lifetime replacement program for effected chips.  Now the FDIV bug is the stuff of computer history, a lesson in bad PR more then bad silicon.

Current Intel processors also suffer from bad math, though in this case its the FSIN (and FCOS) instructions.  these instructions calculate the sine of float point numbers.  The big problem here is Intel’s documentation says the instruction is nearly perfect over a VERY wide range of inputs.  It turns out, according to extensive research by Bruce Dawson, of Google, to be very inaccurate, and not just for a limited set of inputs.

Interestingly the root of the cause is another look-up table, in this case the hard coded value of pi, which Intel, for whatever reason, limited to just 66-bits. a value much too inaccurate for an 80-bit FPU.

It’s well known that Intel missed the jump on tablet and phone processors.  Intel sold off their PXA line of ARM processors to Marvell in 2006, in an attempt to ‘get back to the basics.’  It turned out that this sale perhaps was a bit premature, as the basics ended up being mobile, and mobile is where Intel struggled (by mobile we mean phones/tablets, not laptops, which Intel has no problems with).

In January of 2011 Intel purchased the communications division of Infineon, gaining a line of application and baseband processors, based on ARM architecture of course.  Intel developed this into the SoFIA applications processor, which was ironically fab’d by TSMC.   Eventually the designs would be ported to Intel 14nm process, or that was the plan.

Intel Atom – Now by Rockchip?

So this weeks announcement that Intel has signed an agreement with the Chinese company Rockchip, to cooperate on mobile applications processors is a bit of a surprise, but the details show that it makes sense.  Rockchips current offerings are ARM based, much as Intel’s current SoFIA processor, as well as Apple Ax series, Qualcomm’s SnapDragon, TI’s OMAP, etc. However, the agreement with Rockchip is not about ARM, its about x86.  For the first time in many years Intel has granted another company an x86 license, specifically, Intel will help ROckchip build a quad-core Atom based x86 processor with integrated 3G modem.  Rockchip currently uses TSMC as their fab, however also with this agreement Rockchip gets access to Intel 22nm and 14nm fab capacity.

Who wins?

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Here is a very unusual Engineering Sample from Intel.  These were manufactured in 1996 with a 1994 copyright date.  They are slightly smaller then a Socket 5 Pentium and are a  325 pin SPGA package.

Intel KJ8TSMR00-BA – Engineering Sample

Marked KJ8TSMR00-BA the best guess so far is a early P6 (Pentium Pro) core, without the L2 cache.  If you have any ideas, feel free to post in the comments.

Pentium 166 SY016 Faked from Mobile 120 SY027

Here is an interesting example of what led Intel (and other manufacturers) to start locking down multipliers on their processors as well as adding anti-counterfeiting measures.  This processor appears to be a 166MHz Pentium Processor, which in 1997 sold for around $200.   A 120MHz Mobile Pentium sold for less than $100.  Thus processors of lower speeds were often remarked by unscrupulous dealers and sold as higher speed parts.   The forgeries had to be made quick, as processor prices dropped very quickly, the 166MHz Pentium debuted at nearly $1000.  Most Pentium fakes were made by painting over the original markings and painting/engraving news ones.  Some of the better fakes ground down the old markings first.  Nearly all are easy to spot by the trained eye, wrong fonts, date mismatches, etc.

This particular example, from somewhere in 1997, was faked from a Pentium 120MHz mobile to a 166MHz desktop Pentium.  As far as fakes go this was a fairly conservative one.  Often 166s were faked from 100s or even 75s.  The 120 was a 2x60MHz processor running at 3.1V, while the 166 is 2.5×66 (you see why locking the multiplier discouraged faking?) running at 3.3V.  This resulted in a 28% overclock at about a 6% voltage increase.  In this case the processor likely ran fairly well, if perhaps a bit warm.  Some of the more extreme fakes resulted in very unstable systems due to overheating and pushing a processor well beyond what it was designed for.

Before removing paint

Today counterfeit chips are still a major problem, though it was shifted from the consumer market, where prices are generally low, to the military and industrial market, where prices are high, and there is still demand for older devices.