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MIPS TECHNOLOGIES ANNOUNCES THE WORLD's FASTEST SUPERCOMPUTING
MICROPROCESSOR
The MIPS R8000 is the Fastest Microprocessor in Production;
Powerful Chip Result of Innovative Technology from MIPS and
Toshiba
MOUNTAIN VIEW, Calif. (June 7, 1994) -MIPS Technologies, Inc. today announced the world's fastest commercially available supercomputing microprocessor, the 64-bit RISC MIPS R8000 chip set. Specifically optimized for supercomputing and emphasizing floating point computational performance, the R8000 offers a record-setting SPECfp92 of 310. In addition, the R8000 is inherently designed for symmetric multiprocessing so multiple chips can be closely coupled within the same computer to offer superior performance on applications traditionally solved by large, expensive supercomputers.
The R8000, formerly code-named TFP, was jointly developed by MIPS and Toshiba Corporation. As the first superscalar implementation of the MIPS architecture, the R8000 delivers peak performance roughly equivalent to a Cray Y-MP processor unit. Adding to its high performance, the four-way R8000 issues four instructions per clock cycle. The R8000 provides 300 million double-precision floating point operations per second (MFLOPS), 300 million instructions per second (MIPS) and a SPECint92 of 108. By shifting the power to the microprocessor, the R8000 enables cost-effective systems to perform at the level of multimillion dollar "big iron" supercomputers. (See attached benchmark data.)
"MIPS leads the microprocessor industry with both technology and innovation," said Tom Whiteside, president of MIPS Technologies. "Our partnership with Toshiba has resulted in a tremendously innovative supercomputing microprocessor. MIPS will continue to push the limits of technology to provide the best performance for computer applications from supercomputers to servers, workstations, PCs, games and a host of new consumer applications. MIPS has, and will continue to have, the fastest microprocessors in the world."
"The MIPS R8000 rewrites supercomputing by taking the power that has been constrained to big iron supercomputers and putting it into a microprocessor," said Forest Baskett, chief technical officer and senior vice president of research and development for Silicon Graphics. "Silicon Graphics is building upon the dramatic price/performance brought by the R8000 to put world-class supercomputing into the hands of the many. The Silicon Graphics' Power Challenge, the first system to utilize the R8000 performance, will turn the supercomputing industry on its ear."
The R8000 chip set consists of a superscalar integer unit, a dual floating point unit and two dual ported tag RAMs. The chip set supports up to 16 megabytes (MB) of synchronous data streaming secondary cache. The R8000, fully binary compatible with the R4000 family, is the first processor utilizing the advanced MIPS IV instruction set. The 3.3-volt microprocessor features 16 kilobytes (KB) of instruction cache, 16 KB of dual-ported address and integer unit data cache backed up by the up to 16 MB of secondary cache and 1 KB of branch prediction cache. Together, the integer unit and floating point unit consist of 3.4 million transisters. Designed for a 0.5 micron L-effective 3-metal CMOS process, the integer unit and floating point unit die measure 17.2 mm by 17.3 mm.