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SUN'S SPARC TECHNOLOGY BUSINESS DISCLOSES NEXT-GENERATION PROCESSOR
INDUSTRY'S FIRST PROCESSOR TO OFFER ON-CHIP PROCESSING POWER FOR REAL-TIME MULTIMEDIA COMPRESSION AND DECOMPRESSION
SUNNYVALE, Calif. -- September 19, 1994 -- Sun Microsystems' SPARC Technology Business today unveiled UltraSPARC(tm), the company's next-generation superscalar RISC (reduced-instruction set computing) microprocessor that will be presented at next month's Microprocessor Forum. Critical to supporting the networking needs of the global enterprise, the 64-bit Ultra- SPARC is the industry's first processor with on-chip multimedia support for desktop videoconferencing, real-time MPEG-2 decompression, video effects and texture-mapped triangle rendering. The company estimates the multi-member UltraSPARC family's SPECint92 values to range from 200 to 400 with SPECfp92 values from 250 to 500 -- the highest values in the industry.
"UltraSPARC is state-of-the-art RISC technology that provides the foundation for SPARC leadership throughout the 90s," stated Chet Silvestri, president of Sun Microsystems' SPARC Technology Business. "UltraSPARC delivers the needs of enterprise network processing -- flagship single-processor performance, exceptional multiprocessing support and the industry's most advanced on-chip multimedia capabilities. We've more than clearly raised the industry bar for RISC processing."
UltraSPARC: Performance Leadership
UltraSPARC sustains world-class performance that outdistances the most advanced processors available today. Architected for system performance, efficiency and system design ease, Ultra- SPARC is the industry's first implementation of the advanced SPARC-V9 architecture. UltraSPARC is a 64-bit microprocessor, maintaining full binary compatibility with the over 9,300 soft- ware and hardware products supporting the SPARC architecture. Its four-way superscalar design, dynamic branch prediction and single-cycle branch following, and unique memory access struc- tures allow for up to four instructions per cycle even in the presence of conditional branches and cache misses.
UltraSPARC delivers a number of "industry firsts." The processor delivers the industry's first:
o On-board processing power for two MPEG-2 decomp- ressions with video manipulation simultaneously o Sustained throughput of one load per cycle from second-level external cache o High-bandwidth load/store instructions o Single-cycle branch following o Nested trap support o Superblocking and flexible grouping for efficient instruction dispatch
UltraSPARC is composed of five main blocks. Execution is performed by nine functional units: "twin" ALUs, a Load/Store Unit, a Branch Unit, three Floating Point Units (Adder, Multiply, and Divide/Square Root), and both a Graphics Adder and Multiplier. All units were optimized for short latencies and high throughput.
Initial UltraSPARC family members will range in clock speed from 140 MHz to 200 MHz. The company estimates these family members' SPECint92 values to range from 200 to 300 with SPECfp92 values from 250 to 350. Initial members of the UltraSPARC family will be manufactured by Texas Instruments on their advanced EPIC3, 0.5 um (micron) CMOS process.
The Industry's First Comprehensive Support for Video- conferencing & MPEG-2 Decompression
The demand for advanced graphics capabilities in general- purpose processors is being fueled by the growth in video conferencing, 3-D visualization, animation, multimedia documents, video servers and virtual reality. Processors that can provide high-speed graphical support for two- and three- dimensional imaging, video processing, and image compression will have the competitive edge as high-usage video applications emerge.
UltraSPARC is the first general-purpose processor to deliver on a single-chip 64-bit compute power with advanced graphics throughput and real-time video performance. Able to support real-time compression (H.261) and decompression (MPEG-2) of video information, UltraSPARC can eliminate the need for an expensive video sub-system with a dedicated video processor. No other general-purpose CPU offers this level of multimedia processing -- support for real-time multimedia, 2-D, and 3-D graphics.
Extensions to the SPARC-V9 architecture enable UltraSPARC to quickly perform sophisticated video operations called the Visual Instruction Set (VISual). Many of these optimized graphics instructions execute complex graphics operations in a single clock cycle.
The SPARC-V9 Architecture
SPARC-V9 represents the most significant overall extension to the SPARC architecture since its inception in 1987. SPARC-V9 is an important advance for the microprocessor industry. It provides 64-bit data and addressing, efficient design support for Superscalar processors, support for advanced compiler optim- izations, fast context switching, support for fault tolerance, big- and little-endian byte orders, and a clean structure for modern operating systems. All of this has been accomplished with 100-percent upwards binary compatibility with existing SPARC applications.
Availability
UltraSPARC design data, including simulation models, is available immediately through Sun Microsystems' SPARC Technology Business. UltraSPARC product samples will be available in early 1995.
SPARC Technology Business (STB), a division of Sun Microsystems Inc., was formed in April 1993 to develop, design and distribute SPARC Technologies and products worldwide. STB's portfolio includes microprocessors, chipsets, modules, boards, tech- nology licenses, silicon and system packages and consulting services. STB has more than 400 employees working in product development, engineering, marketing and international sales and support.